图书简介:
CONTENTS
CHAPTER 1 INTRODUCTION TO RF AND WIRELESS TECHNOLOGY 1
1.1 A Wireless World 1
1.2 RF Design Is Challenging 3
1.3 The Big Picture 4
References 5
CHAPTER 2 BASIC CONCEPTS IN RF DESIGN 7
2.1 General Considerations 7
2.1.1 Units in RF Design 7
2.1.2 Time Variance 9
2.1.3 Nonlinearity 12
2.2 Effects of Nonlinearity 14
2.2.1 Harmonic Distortion 14
2.2.2 Gain Compression 16
2.2.3 Cross Modulation 20
2.2.4 Intermodulation 21
2.2.5 Cascaded Nonlinear Stages 29
2.2.6 AM/PM Conversion 33
2.3 Noise 35
2.3.1 Noise as a Random Process 36
2.3.2 Noise Spectrum 37
2.3.3 Effect of Transfer Function on Noise 39
2.3.4 Device Noise 40
2.3.5 Representation of Noise in Circuits 46
2.4 Sensitivity and Dynamic Range 58
2.4.1 Sensitivity 59
2.4.2 Dynamic Range 60
2.5 Passive Impedance Transformation 62
2.5.1 Quality Factor 63
2.5.2 Series-to-Parallel Conversion 63
2.5.3 Basic Matching Networks 65
2.5.4 Loss in Matching Networks 69
2.6 Scattering Parameters 71
2.7 Analysis of Nonlinear Dynamic Systems 75
2.7.1 Basic Considerations 75
2.8 Volterra Series 77
2.8.1 Method of Nonlinear Currents 81
References 86
Problems 86
CHAPTER 3 COMMUNICATION CONCEPTS 91
3.1 General Considerations 91
3.2 Analog Modulation 93
3.2.1 Amplitude Modulation 93
3.2.2 Phase and Frequency Modulation 95
3.3 Digital Modulation 99
3.3.1 Intersymbol Interference 101
3.3.2 Signal Constellations 105
3.3.3 Quadrature Modulation 107
3.3.4 GMSK and GFSK Modulation 112
3.3.5 Quadrature Amplitude Modulation 114
3.3.6 Orthogonal Frequency Division Multiplexing 115
3.4 Spectral Regrowth 118
3.5 Mobile RF Communications 119
3.6 Multiple Access Techniques 123
3.6.1 Time and Frequency Division Duplexing 123
3.6.2 Frequency-Division Multiple Access 125
3.6.3 Time-Division Multiple Access 125
3.6.4 Code-Division Multiple Access 126
3.7 Wireless Standards 130
3.7.1 GSM 132
3.7.2 IS-95 CDMA 137
3.7.3 Wideband CDMA 139
3.7.4 Bluetooth 143
3.7.5 IEEE802.11a/b/g 147
3.8 Appendix I: Differential Phase Shift Keying 151
References 152
Problems 152
CHAPTER 4 TRANSCEIVER ARCHITECTURES 155
4.1 General Considerations 155
4.2 Receiver Architectures 160
4.2.1 Basic Heterodyne Receivers 160
4.2.2 Modern Heterodyne Receivers 171
4.2.3 Direct-Conversion Receivers 179
4.2.4 Image-Reject Receivers 200
4.2.5 Low-IF Receivers 214
4.3 Transmitter Architectures 226
4.3.1 General Considerations 226
4.3.2 Direct-Conversion Transmitters 227
4.3.3 Modern Direct-Conversion Transmitters 238
4.3.4 Heterodyne Transmitters 244
4.3.5 Other TX Architectures 248
4.4 OOK Transceivers 248
References 249
Problems 250
CHAPTER 5 LOW-NOISE AMPLIFIERS 255
5.1 General Considerations 255
5.2 Problem of Input Matching 263
5.3 LNA Topologies 266
5.3.1 Common-Source Stage with Inductive Load 266
5.3.2 Common-Source Stage with Resistive Feedback 269
5.3.3 Common-Gate Stage 272
5.3.4 Cascode CS Stage with Inductive Degeneration 284
5.3.5 Variants of Common-Gate LNA 296
5.3.6 Noise-Cancelling LNAs 300
5.3.7 Reactance-Cancelling LNAs 303
5.4 Gain Switching 305
5.5 Band Switching 312
5.6 High-IP2 LNAs 313
5.6.1 Differential LNAs 314
5.6.2 Other Methods of IP2 Improvement 323
5.7 Nonlinearity Calculations 325
5.7.1 Degenerated CS Stage 325
5.7.2 Undegenerated CS Stage 329
5.7.3 Differential and Quasi-Differential Pairs 331
5.7.4 Degenerated Differential Pair 332
References 333
Problems 333
CHAPTER 6 MIXERS 337
6.1 General Considerations 337
6.1.1 Performance Parameters 338
6.1.2 Mixer Noise Figures 343
6.1.3 Single-Balanced and Double-Balanced Mixers 348
6.2 Passive Downconversion Mixers 350
6.2.1 Gain 350
6.2.2 LO Self-Mixing 357
6.2.3 Noise 357
6.2.4 Input Impedance 364
6.2.5 Current-Driven Passive Mixers 366
6.3 Active Downconversion Mixers 368
6.3.1 Conversion Gain 370
6.3.2 Noise in Active Mixers 377
6.3.3 Linearity 387
6.4 Improved Mixer Topologies 393
6.4.1 Active Mixers with Current-Source Helpers 393
6.4.2 Active Mixers with Enhanced Transconductance 394
6.4.3 Active Mixers with High IP2 397
6.4.4 Active Mixers with Low Flicker Noise 405
6.5 Upconversion Mixers 408
6.5.1 Performance Requirements 408
6.5.2 Upconversion Mixer Topologies 409
References 424
Problems 425
CHAPTER 7 PASSIVE DEVICES 429
7.1 General Considerations 429
7.2 Inductors 431
7.2.1 Basic Structure 431
7.2.2 Inductor Geometries 435
7.2.3 Inductance Equations 436
7.2.4 Parasitic Capacitances 439
7.2.5 Loss Mechanisms 444
7.2.6 Inductor Modeling 455
7.2.7 Alternative Inductor Structures 460
7.3 Transformers 470
7.3.1 Transformer Structures 470
7.3.2 Effect of Coupling Capacitance 475
7.3.3 Transformer Modeling 475
7.4 Transmission Lines 476
7.4.1 T-Line Structures 478
7.5 Varactors 483
7.6 Constant Capacitors 490
7.6.1 MOS Capacitors 491
7.6.2 Metal-Plate Capacitors 493
References 495
Problems 496
CHAPTER 8 OSCILLATORS 497
8.1 Performance Parameters 497
8.2 Basic Principles 501
8.2.1 Feedback View of Oscillators 502
8.2.2 One-Port View of Oscillators 508
8.3 Cross-Coupled Oscillator 511
8.4 Three-Point Oscillators 517
8.5 Voltage-Controlled Oscillators 518
8.5.1 Tuning Range Limitations 521
8.5.2 Effect of Varactor Q 522
8.6 LC VCOs with Wide Tuning Range 524
8.6.1 VCOs with Continuous Tuning 524
8.6.2 Amplitude Variation with Frequency Tuning 532
8.6.3 Discrete Tuning 532
8.7 Phase Noise 536
8.7.1 Basic Concepts 536
8.7.2 Effect of Phase Noise 539
8.7.3 Analysis of Phase Noise: Approach I 544
8.7.4 Analysis of Phase Noise: Approach II 557
8.7.5 Noise of Bias Current Source 565
8.7.6 Figures of Merit of VCOs 570
8.8 Design Procedure 571
8.8.1 Low-Noise VCOs 573
8.9 LO Interface 575
8.10 Mathematical Model of VCOs 577
8.11 Quadrature Oscillators 581
8.11.1 Basic Concepts 581
8.11.2 Properties of Coupled Oscillators 584
8.11.3 Improved Quadrature Oscillators 589
8.12 Appendix I: Simulation of Quadrature Oscillators 592
References 593
Problems 594
CHAPTER 9 PHASE-LOCKED LOOPS 597
9.1 Basic Concepts 597
9.1.1 Phase Detector 597
9.2 Type-I PLLs 600
9.2.1 Alignment of a VCO’s Phase 600
9.2.2 Simple PLL 601
9.2.3 Analysis of Simple PLL 603
9.2.4 Loop Dynamics 606
9.2.5 Frequency Multiplication 609
9.2.6 Drawbacks of Simple PLL 611
9.3 Type-II PLLs 611
9.3.1 Phase/Frequency Detectors 612
9.3.2 Charge Pumps 614
9.3.3 Charge-Pump PLLs 615
9.3.4 Transient Response 620
9.3.5 Limitations of Continuous-Time Approximation 622
9.3.6 Frequency-Multiplying CPPLL 623
9.3.7 Higher-Order Loops 625
9.4 PFD/CP Nonidealities 627
9.4.1 Up and Down Skew and Width Mismatch 627
9.4.2 Voltage Compliance 630
9.4.3 Charge Injection and Clock Feedthrough 630
9.4.4 Random Mismatch between Up and Down Currents 632
9.4.5 Channel-Length Modulation 633
9.4.6 Circuit Techniques 634
9.5 Phase Noise in PLLs 638
9.5.1 VCO Phase Noise 638
9.5.2 Reference Phase Noise 643
9.6 Loop Bandwidth 645
9.7 Design Procedure 646
9.8 Appendix I: Phase Margin of Type-II PLLs 647
References 651
Problems 652
CHAPTER 10 INTEGER-N FREQUENCY SYNTHESIZERS 655
10.1 General Considerations 655
10.2 Basic Integer-N Synthesizer 659
10.3 Settling Behavior 661
10.4 Spur Reduction Techniques 664
10.5 PLL-Based Modulation 667
10.5.1 In-Loop Modulation 667
10.5.2 Modulation by Offset PLLs 670
10.6 Divider Design 673
10.6.1 Pulse Swallow Divider 674
10.6.2 Dual-Modulus Dividers 677
10.6.3 Choice of Prescaler Modulus 682
10.6.4 Divider Logic Styles 683
10.6.5 Miller Divider 699
10.6.6 Injection-Locked Dividers 707
10.6.7 Divider Delay and Phase Noise 709
References 712
Problems 713
CHAPTER 11 FRACTIONAL-N SYNTHESIZERS 715
11.1 Basic Concepts 715
11.2 Randomization and Noise Shaping 718
11.2.1 Modulus Randomization 718
11.2.2 Basic Noise Shaping 722
11.2.3 Higher-Order Noise Shaping 728
11.2.4 Problem of Out-of-Band Noise 732
11.2.5 Effect of Charge Pump Mismatch 733
11.3 Quantization Noise Reduction Techniques 738
11.3.1 DAC Feedforward 738
11.3.2 Fractional Divider 742
11.3.3 Reference Doubling 743
11.3.4 Multiphase Frequency Division 745
11.4 Appendix I: Spectrum of Quantization Noise 748
References 749
Problems 749
CHAPTER 12 POWER AMPLIFIERS 751
12.1 General Considerations 751
12.1.1 Effect of High Currents 754
12.1.2 Efficiency 755
12.1.3 Linearity 756
12.1.4 Single-Ended and Differential PAs 758
12.2 Classification of Power Amplifiers 760
12.2.1 Class A Power Amplifiers 760
12.2.2 Class B Power Amplifiers 764
12.2.3 Class C Power Amplifiers 768
12.3 High-Efficiency Power Amplifiers 770
12.3.1 Class A Stage with Harmonic Enhancement 771
12.3.2 Class E Stage 772
12.3.3 Class F Power Amplifiers 775
12.4 Cascode Output Stages 776
12.5 Large-Signal Impedance Matching 780
12.6 Basic Linearization Techniques 782
12.6.1 Feedforward 783
12.6.2 Cartesian Feedback 786
12.6.3 Predistortion 787
12.6.4 Envelope Feedback 788
12.7 Polar Modulation 790
12.7.1 Basic Idea 790
12.7.2 Polar Modulation Issues 793
12.7.3 Improved Polar Modulation 796
12.8 Outphasing 802
12.8.1 Basic Idea 802
12.8.2 Outphasing Issues 805
12.9 Doherty Power Amplifier 811
12.10 Design Examples 814
12.10.1 Cascode PA Examples 815
12.10.2 Positive-Feedback PAs 819
12.10.3 PAs with Power Combining 821
12.10.4 Polar Modulation PAs 824
12.10.5 Outphasing PA Example 826
References 830
Problems 831
CHAPTER 13 TRANSCEIVER DESIGN EXAMPLE 833
13.1 System-Level Considerations 833
13.1.1 Receiver 834
13.1.2 Transmitter 838
13.1.3 Frequency Synthesizer 840
13.1.4 Frequency Planning 844
13.2 Receiver Design 848
13.2.1 LNA Design 849
13.2.2 Mixer Design 851
13.2.3 AGC 856
13.3 TX Design 861
13.3.1 PA Design 861
13.3.2 Upconverter 867
13.4 Synthesizer Design 869
13.4.1 VCO Design 869
13.4.2 Divider Design 878
13.4.3 Loop Design 882
References 886
Problems 886
INDEX 889
展开
广受好评的射频微电子畅销书,针对最新的架构、电路和器件进行了全面扩展与更新。
无线通信和电力一样无处不在,但射频电路的设计仍然给工程师和研究者们带来巨大挑战。自本书第一版出版15年来,人们对高性能的不断追求使得射频技术爆炸式地增长。第二版与前版相比厚度翻倍,包含上百个例题与习题,更系统地讲述了射频电路与收发机分析与设计的基础知识和最新技术,针对低噪声放大器、混频器、振荡器和频率综合器等电路模块提出了若干新的设计方法与分析技术。最后新增一章,从WiFi的具体设计指标开始,为读者讲述了如何利用前面各章的知识,逐步完成晶体管级的射频收发机设计。
本书内容涵盖:
核心射频原理,包括噪声与非线性,并有机融合了模拟电路设计、微波理论与通信系统等内容。
从射频集成电路设计者的角度直观地描述了调制理论和无线通信标准。
各种收发机架构,如超外差式、滑动中频式、直接变频式、镜像抑制式和低中频式等。
低噪声放大器,包括Cascode共栅和共源等结构、噪声相消技术和电抗抵消技术等。
无源与有源混频器,包括增益与噪声的分析和新型混频器结构等。
压控振荡器,包括相位噪声机制、各种压控振荡器电路结构和关于噪声-功耗-调谐范围的设计权衡技术等。
无源元件,包括集成电感、MOS可变电容器和变压器等。
低相位噪声、低杂散锁相环的分析与设计。
整数N和分数N频率综合器,并介绍了分频器的设计。
功率放大器的原理与电路结构及发射机架构,包括极坐标调制式和反相调制式等。
作者简介
Behzad Razavi
美国加州大学洛杉矶分校(UCLA)电机工程系教授,在长期的教学与科研工作中多次获得各种奖项。主要研究领域包括无线收发机、宽带数据通信电路和数据转换器等。IEEE会士,IEEE杰出教授,国际固态电路会议(ISSCC)50年以来排名前10位的作者之一,在模拟、射频和高速电路领域发表了7本专著。
导读
RF Microelectronics一书的作者Behzad Razavi是美国加州大学洛杉矶分校终身教授,曾经在美国贝尔实验室和惠普实验室从事多年的射频电路设计工作,在射频电路领域有数十年的科研和教学经验。本书的第一版于1998年问世,经过不断的再版和翻译,成为射频电路设计领域的经典书籍。14年来,射频电路设计领域发生了巨大的变化,高集成度的无线设备和宽带的无线应用,促使科研人员在收发信机结构、电路形式及器件特性上,不断推陈出新。而且,新的电路分析方法及建模技术的成熟,使科研人员对射频电路的理解步入一个新的台阶。为反映这些变化,本书的第二版得以问世。
与旧版相比,新版在篇章结构与具体内容上都有显著变化,两者的内容重合度在10%左右。在新版著作中,作者通过大量的设计实例和问题讨论,帮助读者在学习射频电路整体分析方法的同时,了解射频电路设计中可能遇到的细节问题。同时,在新版著作中,作者也更加强调如何帮助读者掌握射频电路设计的基本方法,为此作者还特别增加了一章,用于指导读者如何一步一步地设计晶体管级的双频段WiFi收发信机。
本书的具体内容可以概括如下。第2章介绍射频电路设计中的基本概念,其中增加了双端口网络S参数的定义和计算实例,为本书后续章节的分析打下基础。随后,第3章对无线通信的基本概念进行阐述,重点介绍数字调制方式及其相应的电路实现实例。第4章不仅介绍传统经典结构的各类收发信机,同时基于作者对射频电路最新发展趋势的跟踪,广受关注的新型收发信机结构也出现在新版著作中。值得一提的是,作者还通过问题讨论等方式,结合802.11a/g等具体无线通信标准,讲解了设计中需要注意的实际问题。本书的第5章至第12章,详尽介绍了无线收发信机中的各个子模块。与旧版相比,各子模块的分类方式有显著改进,作者也浓墨重彩地分析了各类新型模块技术,使读者能够及时地掌握射频电路设计的新趋势。新版还加入了无源器件的介绍与分析,使内容更趋完整。本书的第13章是收发信机设计实例,如前所述,本章内容是全书知识点的灵活运用,也是作者专注于设计方法传授的点睛之笔。
本书的内容体系基本涵盖了国内高校“通信基本电路”(亦称“高频电子线路”)专业基础课程的教学内容。但是,通过本人在上海交通大学电子工程系本科三年级的亲身教学实践(1学期64学时),发现本书与“通信基本电路”课程的教学大纲存在一定的不匹配之处。本书的内容相对于本科阶段的知识体系显得内容过于庞大,系统级的电路分析定性讲解有余,而单元电路的定量分析不足。因此,本书更适合作为理工类大专院校电子类专业研究生的课程教材。如果作为理工类大专院校通信、电子类本科生双语教学和全英文教学的教材,建议结合Thomas H. Lee的Design of CMOS Radio-Frequency Integrated Circuits(由电子工业出版社翻译出版),以便于学生掌握单元电路基础知识,为今后的科研打下扎实的基础。本书内容涵盖无线收发信机各个模块的介绍、分析和设计,并融入了Razavi教授数十年的电路设计经验,对从事射频电路设计的专业技术人员而言,更是一本不可多得的必备书籍。
甘小莺 副教授
上海交通大学电子工程系
PREFACE TO THE SECOND EDITION
In the 14 years since the first edition of this book, RF IC design has experienced a dramatic metamorphosis. Innovations in transceiver architectures, circuit topologies, and device structures have led to highly-integrated “radios” that span a broad spectrum of applications. Moreover, new analytical and modeling techniques have considerably improved our understanding of RF circuits and their underlying principles. A new edition was therefore due.
The second edition differs from the first in several respects:
1. I realized at the outset—three-and-a-half years ago—that simply adding “patches” to the first edition would not reflect today’s RF microelectronics. I thus closed the first edition and began with a clean slate. The two editions have about 10% overlap.
2. I wanted the second edition to contain greater pedagogy, helping the reader understand both the fundamentals and the subtleties. I have thus incorporated hundreds of examples and problems.
3. I also wanted to teach design in addition to analysis. I have thus included step-by-step design procedures and examples. Furthermore, I have dedicated Chapter 13 to the step-by-step transistor-level design of a dual-band WiFi transceiver.
4. With the tremendous advances in RF design, some of the chapters have inevitably become longer and some have been split into two or more chapters. As a result, the second edition is nearly three times as long as the first.
Suggestions for Instructors and Students
The material in this book is much more than can be covered in one quarter or semester. The following is a possible sequence of the chapters that can be taught in one term with reasonable depth. Depending on the students’ background and the instructor’s preference, other combinations of topics can also be covered in one quarter or semester.
Chapter 1: Introduction to RF and Wireless Technology
This chapter provides the big picture and should be covered in about half an hour.
Chapter 2: Basic Concepts in RF Design
The following sections should be covered: General Considerations, Effects of Nonlinearity (the section on AM/PM Conversion can be skipped), Noise, and Sensitivity and Dynamic Range. (The sections on Passive Impedance Transformation, Scattering Parameters, and Analysis of Nonlinear Dynamic Systems can be skipped.) This chapter takes about six hours of lecture.
Chapter 3: Communication Concepts
This chapter can be covered minimally in a quarter system—for example, Analog Modulation, Quadrature Modulation, GMSK Modulation, Multiple Access Techniques, and the IEEE802.11a/b/g Standard. In a semester system, the concept of signal constellations can be introduced and a few more modulation schemes and wireless standards can be taught. This chapter takes about two hours in a quarter system and three hours in a semester system.
Chapter 4: Transceiver Architectures
This chapter is relatively long and should be taught selectively. The following sections should be covered: General Considerations, Basic and Modern Heterodyne Receivers, Direct-Conversion Receivers, Image-Reject Receivers, and Direct-Conversion Transmitters. In a semester system, Low-IF Receivers and Heterodyne Transmitters can be covered as well. This chapter takes about eight hours in a quarter system and ten hours in a semester system.
Chapter 5: Low-Noise Amplifiers
The following sections should be covered: General Considerations, Problem of Input Matching, and LNA Topologies. A semester system can also include Gain Switching and Band Switching or High-IP2 LNAs. This chapter takes about six hours in a quarter system and eight hours in a semester system.
Chapter 6: Mixers
The following sections should be covered: General Considerations, Passive Downconversion Mixers (the computation of noise and input impedance of voltage driven sampling mixers can be skipped), Active Downconversion Mixers, and Active Mixers with High IP2. In a semester system, Active Mixers with Enhanced Transconductance, Active Mixers with Low Flicker Noise, and Upconversion Mixers can also be covered. This chapter takes about eight hours in a quarter system and ten hours in a semester system.
Chapter 7: Passive Devices
This chapter may not fit in a quarter system. In a semester system, about three hours can be spent on basic inductor structures and loss mechanisms and MOS varactors.
Chapter 8: Oscillators
This is a long chapter and should be taught selectively. The following sections should be covered: Basic Principles, Cross-Coupled Oscillator, Voltage-Controlled Oscillators, Low-Noise VCOs. In a quarter system, there is little time to cover phase noise. In a semester system, both approaches to phase noise analysis can be taught. This chapter takes about six hours in a quarter system and eight hours in a semester system.
Chapter 9: Phase-Locked Loops
This chapter forms the foundation for synthesizers. In fact, if taught carefully, this chapter naturally teaches integer-N synthesizers, allowing a quarter system to skip the next chapter. The following sections should be covered: Basic Concepts, Type-I PLLs, Type-II PLLs, and PFD/CP Nonidealities. A semester system can also include Phase Noise in PLLs and Design Procedure. This chapter takes about four hours in a quarter system and six hours in a semester system.
Chapter 10: Integer-N Synthesizers
This chapter is likely sacrificed in a quarter system. A semester system can spend about four hours on Spur Reduction Techniques and Divider Design.
Chapter 11: Fractional-N Synthesizers
This chapter is likely sacrificed in a quarter system. A semester system can spend about four hours on Randomization and Noise Shaping. The remaining sections may be skipped.
Chapter 12: Power Amplifiers
This is a long chapter and, unfortunately, is often sacrificed for other chapters. If coverage is desired, the following sections may be taught: General Considerations, Classification of Power Amplifiers, High-Efficiency Power Amplifiers, Cascode Output Stages, and Basic Linearization Techniques. These topics take about four hours of lecture. Another four hours can be spent on Doherty Power Amplifier, Polar Modulation, and Outphasing.
Chapter 13: Transceiver Design Example
This chapter provides a step-by-step design of a dual-band transceiver. It is possible to skip the state-of-the-art examples in Chapters 5, 6, and 8 to allow some time for this chapter. The system-level derivations may still need to be skipped. The RX, TX, and synthesizer transistor-level designs can be covered in about four hours.
A solutions manual is available for instructors via the Pearson Higher Education Instructor Resource Center web site: pearsonhighered.com/irc; and a set of Powerpoint slides is available for instructors at informit.com/razavi. Additional problems will be posted on the book’s website (informit.com/razavi).
—Behzad Razavi
July 2011
PREFACE TO THE FIRST EDITION
The annual worldwide sales of cellular phones has exceeded $2.5B. With 4.5 million customers, home satellite networks comprise a $2.5B industry. The global positioning system is expected to become a $5B market by the year 2000. In Europe, the sales of equipment and services for mobile communications will reach $30B by 1998. The statistics are overwhelming.
The radio frequency (RF) and wireless market has suddenly expanded to unimaginable dimensions. Devices such as pagers, cellular and cordless phones, cable modems, and RF identification tags are rapidly penetrating all aspects of our lives, evolving from luxury items to indispensable tools. Semiconductor and system companies, small and large, analog and digital, have seen the statistics and are striving to capture their own market share by introducing various RF products.
RF design is unique in that it draws upon many disciplines unrelated to integrated circuits (ICs). The RF knowledge base has grown for almost a century, creating a seemingly endless body of literature for the novice.
This book deals with the analysis and design of RF integrated circuits and systems. Providing a systematic treatment of RF electronics in a tutorial language, the book begins with the necessary background knowledge from microwave and communication theory and leads the reader to the design of RF transceivers and circuits. The text emphasizes both architecture and circuit level issues with respect to monolithic implementation in VLSI technologies. The primary focus is on bipolar and CMOS design, but most of the concepts can be applied to other technologies as well. The reader is assumed to have a basic understanding of analog IC design and the theory of signals and systems.
The book consists of nine chapters. Chapter 1 gives a general introduction, posing questions and providing motivation for subsequent chapters. Chapter 2 describes basic concepts in RF and microwave design, emphasizing the effects of nonlinearity and noise.
Chapters 3 and 4 take the reader to the communication system level, giving an overview
of modulation, detection, multiple access techniques, and wireless standards. While initially appearing to be unnecessary, this material is in fact essential to the concurrent design of RF circuits and systems.
Chapter 5 deals with transceiver architectures, presenting various receiver and transmitter topologies along with their merits and drawbacks. This chapter also includes a number of case studies that exemplify the approaches taken in actual RF products.
Chapters 6 through 9 address the design of RF building blocks: low-noise amplifiers and mixers, oscillators, frequency synthesizers, and power amplifiers, with particular attention to minimizing the number of off-chip components. An important goal of these chapters is to demonstrate how the system requirements define the parameters of the circuits and how the performance of each circuit impacts that of the overall transceiver.
I have taught approximately 80% of the material in this book in a 4-unit graduate course at UCLA. Chapters 3, 4, 8, and 9 had to be shortened in a ten-week quarter, but in a semester system they can be covered more thoroughly.
Much of my RF design knowledge comes from interactions with colleagues. Helen Kim, Ting-Ping Liu, and Dan Avidor of Bell Laboratories, and David Su and Andrew Gzegorek of Hewlett-Packard Laboratories have contributed to the material in this book in many ways. The text was also reviewed by a number of experts: Stefan Heinen (Siemens), Bart Jansen (Hewlett-Packard), Ting-Ping Liu (Bell Labs), John Long (University of Toronto), Tadao Nakagawa (NTT), Gitty Nasserbakht (Texas Instruments), Ted Rappaport (Virginia Tech), Tirdad Sowlati (Gennum), Trudy Stetzler (Bell Labs), David Su (Hewlett-Packard), and Rick Wesel (UCLA). In addition, a number of UCLA students, including Farbod Behbahani, Hooman Darabi, John Leete, and Jacob Rael, “test drove” various chapters and provided useful feedback. I am indebted to all of the above for their kind assistance.
I would also like to thank the staff at Prentice Hall, particularly Russ Hall, Maureen Diana, and Kerry Riordan for their support.
—Behzad Razavi
July 1997
ACKNOWLEDGMENTS
I have been fortunate to benefit from the support of numerous people during the writing, review, and production phases of this book. I would like to express my thanks here.
Even after several rounds of self-editing, it is possible that typos or subtle mistakes have eluded the author. Sometimes, an explanation that is clear to the author may not be so to the reader. And, occasionally, the author may have missed a point or a recent development. A detailed review of the book by others thus becomes necessary. The following individuals meticulously reviewed various chapters, discovered my mistakes, and made valuable suggestions:
Ali Afsahi (Broadcom)
Pietro Andreani (Lund University)
Ashkan Borna (UC Berkeley)
Jonathan Borremans (IMEC)
Debopriyo Chowdhury (UC Berkeley)
Matteo Conta (Consultant)
Ali Homayoun (UCLA)
Velntina del Lattorre (Consultant)
Jane Gu (University of Florida)
Peng Han (Beken)
Pavan Hanumolu (Oregon State University)
Daquan Huang (Texas Instruments)
Sy-Chyuan Hwu (UCLA)
Amin Jahanian (UCI)
Jithin Janardhan (UCLA)
Shinwon Kang (UC Berkeley)
Iman Khajenasiri (Sharif University of Technology)
Yanghyo Kim (UCLA)
Abbas Komijani (Atheros)
Tai-Cheng Lee (National Taiwan University)
Antonio Liscidini (University of Pavia)
Shen-Iuan Liu (National Taiwan University)
Xiaodong Liu (Lund University)
Jian Hua Lu (UCLA)
Howard Luong (Hong Kong University of Science and Technology)
Elvis Mak (University of Macau)
Rabih Makarem (Atheros)
Rui Martins (University of Macau)
Andrea Mazzanti (University of Pavia)
Karthik Natarajan (University of Washington)
Nitin Nidhi (UCLA)
Joung Park (UCLA)
Paul Park (Atheros)
Stefano Pellerano (Intel)
Jafar Savoj (Xilinx)
Parmoon Seddighrad (University of Washington)
Alireza Shirvani (Ralink)
Tirdad Sowlati (Qualcomm)
Francesco Svelto (University of Pavia)
Enrico Temporiti (ST Microelectronics)
Federico Vecchi (University of Pavia)
Vijay Viswam (Lund University)
Vidojkovic Vojkan (IMEC)
Ning Wang (UCLA)
Weifeng Wang (Beken)
Zhi Gong Wang (Southeast University)
Marco Zanuso (UCLA)
Yunfeng Zhao (Beken)
Alireza Zolfaghari (Broadcom)
I am thankful for their enthusiastic, organized, and to-the-point reviews.
The book’s production was proficiently managed by the staff at Prentice Hall, including Bernard Goodwin and Julie Nahil. I would like to thank both.
As with my other books, my wife, Angelina, typed the entire second edition in Latex and selflessly helped me in this three-and-a-half-year endeavor. I am grateful to her.
—Behzad Razavi
ABOUT THE AUTHOR
Behzad Razavi received the BSEE degree from Sharif University of Technology in 1985 and MSEE and PhDEE degrees from Stanford University in 1988 and 1992, respectively. He was with AT&T Bell Laboratories and Hewlett-Packard Laboratories until 1996. Since 1996, he has been associate professor and, subsequently, professor of electrical engineering at University of California, Los Angeles. His current research includes wireless transceivers, frequency synthesizers, phase-locking and clock recovery for high-speed data communications, and data converters.
Professor Razavi was an adjunct professor at Princeton University from 1992 to 1994, and at Stanford University in 1995. He served on the Technical Program Committees of the International Solid-State Circuits Conference (ISSCC) from 1993 to 2002 and VLSI Circuits Symposium from 1998 to 2002. He has also served as guest editor and associate editor of the IEEE Journal of Solid-State Circuits, IEEE Transactions on Circuits and Systems, and International Journal of High Speed Electronics.
Professor Razavi received the Beatrice Winner Award for Editorial Excellence at the 1994 ISSCC; the best paper award at the 1994 European Solid-State Circuits Conference; the best panel award at the 1995 and 1997 ISSCC; the TRW Innovative Teaching Award in
1997; the best paper award at the IEEE Custom Integrated Circuits Conference (CICC) in 1998; and McGraw-Hill First Edition of the Year Award in 2001. He was the co-recipient of both the Jack Kilby Outstanding Student Paper Award and the Beatrice Winner Award for Editorial Excellence at the 2001 ISSCC. He received the Lockheed Martin Excellence in Teaching Award in 2006; the UCLA Faculty Senate Teaching Award in 2007; and the CICC Best Invited Paper Award in 2009. He was also recognized as one of the top ten authors in the fifty-year history of ISSCC. He received the IEEE Donald Pederson Award in Solid-State Circuits in 2012.
Professor Razavi is an IEEE Distinguished Lecturer, a Fellow of IEEE, and the author of Principles of Data Conversion System Design, RF Microelectronics, First Edition (translated to Chinese, Japanese, and Korean), Design of Analog CMOS Integrated Circuits (translated to Chinese, Japanese, and Korean), Design of Integrated Circuits for Optical Communications, and Fundamentals of Microelectronics (translated to Korean and Portuguese), and the editor of Monolithic Phase-Locked Loops and Clock Recovery Circuits and Phase-Locking in High-Performance Systems.
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